Philip Sheu

• Architectures: x86 server architecture, x86 front side bus, SDRAM interface, PCI, ISA, SCSI, I²C, JTAG, ACPI, server management.
• Hardware: High-speed board design; digital circuits and systems design; some analog and microwave design.
• Software: x86 assembly, BIOS, C, Microsoft Windows NT drivers, CGI scripting, Microsoft Active Server Pages, JavaScript, Visual Basic, HP VEE.
• Tools: PCB design and simulation (Mentor Graphics, SPICE), microwave design and simulation (EEsof, Sonnet), American Arium ICE, Corelis PCI pre-processor, Verisys SCSI analyzer, some Microsoft WinDbg NT debugger.

• Lead architecture, design, and bring-up of the motherboard for HP E800 NetServer, a two-way flip-chip Pentium III server for small-to-medium businesses.
• Focus is on first-to-market, low cost, compact ATX form factor, high reliability, and leveragability into future products. Work closely with strategic design partners to achieve time-to-market and to optimize HP resources.
• Design and debug high-speed signaling, SDRAM timing, PCI architecture, interrupt routing, ACPI architecture, wake-up features, power distribution, EMI, thermal and acoustic solutions, and BIOS structures.

• Develop the motherboard for HP E60 NetServer.
• Drive to root cause technical issues found with existing server products. Feedback learnings into subsequent designs to improve customer satisfaction, feature set, and yield of future server products.

• Design boards and VXI-based switching system for custom avionics and satellite test system. Manage PCA process from design/schematic entry to layout/assembly. Lead technical interactions with customers from requirements definition to design reviews and on-site integration. Enable project managers to meet cost and schedule targets by rigorously applying project management fundamentals to the planning of engineering tasks. Establish various design methodologies used division-wide by hardware design engineers and by presales and project managers for quoting and planning. Create tools to facilitate manufacturing.

• Initiate project to study and practice the application of World Wide Web technology towards organizational learning. Promote project to the executive officers of a satellite telecommunications research laboratory. Implement a prototype web-based knowledge exchange system and lay groundwork for full implementation.
• Advisors:
  Professor John F. Rockart, Director, Center for Information Systems Research
  Dr. Jeanne W. Ross, Research Scientist, Center for Information Systems Research

• Instruct students in weekly recitations on digital design as part of Digital Systems Laboratory course.
• Lead student project groups and consult on design and debug of various digital systems projects.
• Design and build signal processing and artificial intelligence systems using self-built microcontroller unit (based on Intel 29C10 sequencer), PALs, ADC/DAC, SRAM, UART, arithmetic unit, etc.

• Perform system design and analysis of miniaturized 6/4-GHz satellite receiver front end.
• Design and prototype 2-GHz low noise temperature-compensated local oscillator to meet specification requirements of the receiver front end.
• Design and prototype C-band miniature microstrip interdigital filters to meet specification requirements of the receiver front end.

• M.S. in Electrical Engineering and Computer Sciences, June '95.
  Thesis: Design and Analysis of Miniaturized 6/4-GHz Satellite Receiver Front End
  Advisors:
  Professor David H. Staelin, Principal Investigator, Research Laboratory of Electronics, M.I.T.
  Dr. Ramesh K. Gupta, Director, COMSAT Laboratories
• B.S. in Electrical Engineering with Minor in Economics, June '94.
  Thesis: Automation of Wafer Fabrication with Graphical Programming
  Advisor: Professor Rafael Reif, Director, Microsystem Technology Laboratories, M.I.T.
• Relevant courses include VLSI, computer architecture, analog design, digital design, signal processing, electromagnetism, structured programming, management, finance.

©2000 Philip Sheu [email protected]